Input Signals - D/A Converters
Device NO. | Signal Name | Description |
X00 | D/A module ready | If the power is inputted to a CPU or a CPU is reset, D/A conversion will be ready. At this time, this signal is set and D/A conversion is processed. When this signal is off, D/A conversion is not processed. In the following case, D/A module ready will be reset. During offset/gain calibration mode |
X0A | Flag indicating operation condition set up | This is used as the interlock condition to set/reset request to set up operation condition(Y0A) when enabling / disabling to D/A- convert is switched. In the following case, flag indicating operation condition set up will be reset. When module ready(X00) is reset. When requesting to set up operation condition(Y0A) is set. |
X0B | Flag indicating the channel switched | This is used as the interlock condition to set/reset request to switch a channel (Y03) when the channel of which offset and gain are calibrated is switched. |
X0C | Flag indicating the set value modified | This is used as the interlock condition to set/reset Requesting to modify a set value(Y0C) when offset/gain are calibrated. |
X0D | Flag indicating offset or gain calibration mode | This is used as the interlock condition to set/reset Requesting to calibrate offset/gain when offset/gain are calibrated. |
X0F | Flag indicating an error in D/A module | If an error occurs in writing to buffer memory, the flag is set. To clear error code, requesting to clear an error(Y0F) is set. |