Input and Output Signal - PLCS RTD
- CIMON (Unlicensed)
Owned by CIMON (Unlicensed)
Mar 26, 2024
1 min read
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Signal direction(CPU ← RTD) | Signal direction(CPU → RTD) | ||
Input | Signal | Output | Signal |
X00 | RTD module Ready | Y00 | Reserved |
X01 | RTD conversion completion flag | Y01 | |
X02 | Set value saving completion flag | Y02 | Requesting to save set value |
X03 | Reserved | Y03 | Reserved |
X04 | Y04 | ||
X05 | Y05 | ||
X06 | Y06 | ||
X07 | Y07 | ||
X08 | Y08 | ||
X09 | Y09 | ||
X0A | Y0A | ||
X0B | Y0B | ||
X0C | Y0C | ||
X0D | Y0D | ||
X0E | Y0E | Requesting circuit calibration | |
X0F | RTD module error flag | Y0F | Requesting error clear |
** (I/O signal number appears as above when RTD module is installed at the 1st slot)