Internal I/O - PLCS HSC

Signal Direction (CPU <-HSC Module)

Signal Direction (CPU ->HSC Module)

Input

Signal Name

Output

Signal Name

X00

CH1

DPRAM ACK Signal

Y00

CH1

Requesting to Reset Coincidence Signal 1

X01

Counted Value Greater 1

Y01

Requesting to Preset

X02

Counted Value Coincident 1

Y02

Enabling Coincidence Output

X03

Counted Value Less 1

Y03

DRRAM REQUEST

X04

Detecting Request for Outer Presetting

Y04

Enabling to Count

X05

Counted Value Greater 2

Y05

Requesting to Reset Detecting Outer Presetting

X06

Counted Value Coincident 2

Y06

Requesting to Start to Count

X07

Counted Value Less 2

Y07

Requesting to Reset Coincidence Signal 2

X08

CH2

Counted Value Greater 1

Y08

CH2

Requesting to Reset Coincidence Signal 1

X09

Counted Value Coincident 1

Y09

Requesting to Preset

X0A

Counted Value Less 1

Y0A

Enabling Coincidence Output

X0B

Detecting Request for Outer Presetting

Y0B

DRRAM REQUEST

X0C

Counted Value Greater 2

Y0C

Enabling to Count

X0D

Counted Value Coincident 2

Y0D

Requesting to Reset Detecting Outer Presetting

X0E

Counted Value Less 2

Y0E

Requesting to Start to Count

X0F

DPRAM ACK Signal

Y0F

Requesting to Reset Coincidence Signal 2